HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1295
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417320.pdf
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36.4.4
An H-UDI reset is executed by inputting an H-UDI reset assert command in SDIR. An H-UDI
reset is of the same kind as a power-on reset. An H-UDI reset is released by inputting an H-UDI
reset negate command. The required time between the H-UDI reset assert command and H-UDI
reset negate command is the same as time for keeping the RESETP pin low to apply a power-on
reset.
36.4.5
The H-UDI interrupt function generates an interrupt by setting a command from the H-UDI in the
SDIR. An H-UDI interrupt is a general exception or an interrupt operation, resulting in a branch to
an address based on the VBR value plus offset, and with return by the RTE instruction. This
interrupt request has a fixed priority level of 15.
H-UDI interrupts are accepted in sleep mode, but not in standby mode.
TDO
(When the H-UDI
command is set)
Chip internal reset
TDO
(When the boundary scan
command is set)
CPU state
H-UDI Reset
H-UDI Interrupt
SDIR
TCK
H-UDI reset assert
Figure 36.3
Figure 36.4
H-UDI Data Transfer Timing
t
TDO
H-UDI Reset
H-UDI reset negate
Section 36
Rev. 3.00
Jan. 18, 2008
User Debugging Interface (H-UDI)
t
TDO
Branch to H'A0000000
Page 1233 of 1458
REJ09B0033-0300
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