HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 748

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 21
21.3.2
SICTR is a 16-bit readable/writable register that sets the SIOF operating state.
Rev. 3.00 Jan. 18, 2008 Page 686 of 1458
REJ09B0033-0300
Bit
15
14
13 to 10
Control Register (SICTR)
Bit Name
SCKE
FSE
Serial I/O with FIFO (SIOF)
Initial
Value
0
0
All 0
R/W
R/W
R/W
R
Description
Serial Clock Output Enable
This bit is valid in master mode.
0: Disables the SIOFSCK output (outputs 0)
1: Enables the SIOFSCK output
This bit is initialized in module stop mode.
Frame Synchronous Signal Output Enable
This bit is valid in master mode.
0: Disables the SIOFSYNC output (outputs 0)
1: Enables the SIOFSYNC output
This bit is initialized in module stop mode.
Reserved
These bits are always read as 0. The write value should
always be 0.
If this bit is set to 1, the SIOF initializes the baud
rate generator and initiates the operation. At the
same time, the SIOF outputs the clock generated by
the baud rate generator to the SIOFSCK pin.
If this bit is set to 1, the SIOF initializes the frame
counter and initiates the operation.

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