sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 92

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

1
1
Port Integration Module (S12HYPIMV1)
2.3.32
2.3.33
92
Address 0x0259
Address 0x025A
Read: Anytime.
Write: Anytime.
Read: Anytime.
Write:Never, writes to this register have no effect.
Field
Field
PTIP
PTP
Reset
Reset
7-0
7-0
W
W
R
R
Port P general purpose input/output data—Data Register, LCD segment driver output, PWM channel output
Port P pins are associated with the PWM channel output and LCD segment driver output.
When not used with the alternative functions, these pins can be used as general purpose I/O. If the associated data
direction bits of these pins are set to 1, a read returns the value of the port register, otherwise the buffered pin input
state is read.
Port P input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
• The LCD segment takes precedence over the PWM function and the general purpose I/O function is LCD
• The PWM function takes precedence over the general purpose I/O function if the PWM channel is enabled.
DDRP7
PTIP7
Port P Input Register (PTIP)
Port P Data Direction Register (DDRP)
segment output is enabled
u
0
7
7
= Unimplemented or Reserved
DDRP6
PTIP6
u
0
6
6
Figure 2-31. Port P Data Direction Register (DDRP)
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-28. PTIP Register Field Descriptions
Table 2-27. PTP Register Field Descriptions
Figure 2-30. Port P Input Register (PTIP)
DDRP5
PTIP5
u
0
5
5
DDRP4
PTIP4
u
0
4
4
Description
Description
u = Unaffected by reset
DDRP3
PTIP3
3
u
3
0
DDRP2
PTIP2
u
0
2
2
Freescale Semiconductor
DDRP1
Access: User read/write
PTIP1
u
0
1
1
Access: User read
DDRP0
PTIP0
u
0
0
0
1
1