sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 663

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 18
Liquid Crystal Display (LCD40F4BV1) Block Description
Revision History
18.1
The LCD40F4BV1 driver module has 40 frontplane drivers and 4 backplane drivers so that a maximum of
160 LCD segments are controllable. Each segment is controlled by a corresponding bit in the LCD RAM.
Four multiplex modes (1/1, 1/2, 1/3, 1/4 duty), and three bias (1/1, 1/2, 1/3) methods are available. The V
voltage is the lowest level of the output waveform and V
backplane pins can be multiplexed with other port functions.
The LCD40F4BV1 driver system consists of five major sub-modules:
18.1.1
The LCD40F4BV1 includes these distinctive features:
Freescale Semiconductor
Number
Version
01.00
01.08
01.09
Timing and Control – consists of registers and control logic for frame clock generation, bias
voltage level select, frame duty select, backplane select, and frontplane select/enable to produce
the required frame frequency and voltage waveforms.
LCD RAM – contains the data to be displayed on the LCD. Data can be read from or written to the
display RAM at any time.
Frontplane Drivers – consists of 40 frontplane drivers.
Backplane Drivers – consists of 4 backplane drivers.
Voltage Generator – Based on voltage applied to VLCD, it generates the voltage levels for the
timing and control logic to produce the frontplane and backplane waveforms.
Introduction
27-Mar-08
25-Apr-08
Revision
26-Jul-00
Features
Date
Effective
Date
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Author
Table 18-1. LCD40F4BV1 Revision History
initial LCD module spec
New specification for 9S12HY family based on 9S12H family specification
Update for 9S12HY defining last registers as unimplemented
3
becomes the highest level. All frontplane and
Description of Changes
663
0

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