sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 530

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

32 KByte Flash Module (S12FTMRC32K1V1)
530
FPHS[1:0]
FPLS[1:0]
FPOPEN
FPHDIS
FPLDIS
RNV[6]
Field
4–3
1–0
7
6
5
2
Flash Protection Operation Enable — The FPOPEN bit determines the protection function for program or
erase operations as shown in
0 When FPOPEN is clear, the FPHDIS and FPLDIS bits define unprotected address ranges as specified by the
1 When FPOPEN is set, the FPHDIS and FPLDIS bits enable protection for the address range specified by the
Reserved Nonvolatile Bit — The RNV bit should remain in the erased state for future enhancements.
Flash Protection Higher Address Range Disable — The FPHDIS bit determines whether there is a
protected/unprotected area in a specific region of the P-Flash memory ending with global address 0x3_FFFF.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
Flash Protection Higher Address Size — The FPHS bits determine the size of the protected/unprotected area
in P-Flash memory as shown
Flash Protection Lower Address Range Disable — The FPLDIS bit determines whether there is a
protected/unprotected area in a specific region of the P-Flash memory beginning with global address 0x3_8000.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
Flash Protection Lower Address Size — The FPLS bits determine the size of the protected/unprotected area
in P-Flash memory as shown in
corresponding FPHS and FPLS bits
corresponding FPHS and FPLS bits
1
FPOPEN
For range sizes, refer to
FPHS[1:0]
1
1
1
1
0
0
0
0
Table 15-18. P-Flash Protection Higher Address Range
00
01
10
11
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
FPHDIS
Table 15-17. P-Flash Protection Function
Table 15-16. FPROT Field Descriptions
1
1
0
0
1
1
0
0
inTable
Table 15-17
Table
Global Address Range
0x3_C000–0x3_FFFF
0x3_F800–0x3_FFFF
0x3_F000–0x3_FFFF
0x3_E000–0x3_FFFF
Table 15-18
FPLDIS
15-18. The FPHS bits can only be written to while the FPHDIS bit is set.
15-19. The FPLS bits can only be written to while the FPLDIS bit is set.
1
0
1
0
1
0
1
0
for the P-Flash block.
and
No P-Flash Protection
Protected Low Range
Protected High Range
Protected High and Low Ranges
Full P-Flash Memory Protected
Unprotected Low Range
Unprotected High Range
Unprotected High and Low Ranges
Description
Table
15-19.
Function
Protected Size
16 Kbytes
2 Kbytes
4 Kbytes
8 Kbytes
1
Freescale Semiconductor