sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 241

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
RTIOSCSEL
COPOSCSE
Field
PRE
PCE
3
2
1
0
L
RTI Enable During Pseudo Stop Bit — PRE enables the RTI during Pseudo Stop Mode.
0 RTI stops running during Pseudo Stop Mode.
1 RTI continues running during Pseudo Stop Mode if RTIOSCSEL=1.
Note: If PRE=0 or RTIOSCSEL=0 then the RTI will go static while Stop Mode is active. The RTI counter will not
COP Enable During Pseudo Stop Bit — PCE enables the COP during Pseudo Stop Mode.
0 COP stops running during Pseudo Stop Mode
1 COP continues running during Pseudo Stop Mode if COPOSCSEL=1
Note: If PCE=0 or COPOSCSEL=0 then the COP will go static while Stop Mode is active. The COP counter will
RTI Clock Select— RTIOSCSEL selects the clock source to the RTI. Either IRCCLK or OSCCLK. Changing the
RTIOSCSEL bit re-starts the RTI time-out period.
RTIOSCSEL can only be set to 1, if UPOSC=1.
UPOSC= 0 clears the RTIOSCSEL bit.
0 RTI clock source is IRCCLK.
1 RTI clock source is OSCCLK.
COP Clock Select— COPOSCSEL selects the clock source to the COP. Either IRCCLK or OSCCLK. Changing
the COPOSCSEL bit re-starts the COP time-out period.
COPOSCSEL can only be set to 1, if UPOSC=1.
UPOSC= 0 clears the COPOSCSEL bit.
0 COP clock source is IRCCLK.
1 COP clock source is OSCCLK
be reset.
not be reset.
Table 7-5. CPMUCLKS Descriptions (continued)
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
S12 Clock, Reset and Power Management Unit (S12CPMU) Block Description
Description
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