sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 163

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
5.3.2
A summary of the registers associated with the BDM is shown in
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
Freescale Semiconductor
0x3_FF0A
0x3_FF0B
0x3_FF00
0x3_FF01
0x3_FF02
0x3_FF03
0x3_FF04
0x3_FF05
0x3_FF06
0x3_FF07
0x3_FF08
0x3_FF09
Address
Global
Register Descriptions
BDMCCR
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
BDMPPR
Reserved
Reserved
Reserved
BDMSTS
Register
Name
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
ENBDM
CCR7
BPAE
Bit 7
X
X
X
X
X
X
0
0
0
0
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Figure 5-2. BDM Register Summary
= Unimplemented, Reserved
= Indeterminate
BDMACT
CCR6
X
X
X
X
X
6
0
0
0
0
0
CCR5
X
X
X
X
X
5
0
0
0
0
0
0
CCR4
SDV
X
X
X
X
X
4
0
0
0
0
0
Figure
TRACE
CCR3
BPP3
X
X
X
X
X
3
0
0
0
0
0
Background Debug Module (S12SBDMV1)
5-2. Registers are accessed by
= Implemented (do not alter)
= Always read zero
CCR2
BPP2
X
X
X
X
X
2
0
0
0
0
0
UNSEC
CCR1
BPP1
X
X
X
X
1
0
0
0
0
0
CCR0
BPP0
Bit 0
X
X
X
X
0
0
0
0
0
0
163

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