sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 656

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

64 KByte Flash Module (S12FTMRC64K1V1)
17.4.5.14 Erase Verify D-Flash Section Command
The Erase Verify D-Flash Section command will verify that a section of code in the D-Flash is erased. The
Erase Verify D-Flash Section command defines the starting point of the data to be verified and the number
of words.
656
Register
FSTAT
Field margin levels must only be used during verify of the initial factory
programming.
Field margin levels can be used to check that Flash memory contents have
adequate margin for data retention at the normal level setting. If unexpected
results are encountered when checking Flash memory contents at field
margin levels, the Flash memory contents should be erased and
reprogrammed.
MGSTAT1
MGSTAT0
ACCERR
Table 17-58. Set Field Margin Level Command Error Handling
Error Bit
FPVIOL
1
2
(CCOBIX=001)
Table 17-57. Valid Set Field Margin Level Settings
Read margin to the erased state
Read margin to the programmed state
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
0x0000
0x0001
0x0002
0x0003
0x0004
CCOB
Set if CCOBIX[2:0] != 001 at command launch
Set if command not available in current mode (see
Set if an invalid global address [17:16] is supplied
Set if an invalid margin level setting is supplied
None
None
None
CAUTION
NOTE
Return to Normal Level
Field Margin-1 Level
Field Margin-0 Level
User Margin-1 Level
User Margin-0 Level
Level Description
Error Condition
1
2
1
2
Table
17-27)
Freescale Semiconductor