sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 268

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

S12 Clock, Reset and Power Management Unit (S12CPMU) Block Description
7.4.2
An example of startup of clock system from Reset is given in
7.4.3
An example of what happens going into Stop Mode and exiting Stop Mode after an interrupt is shown in
Figure
268
LOCK
System
Reset
LOCK
SYNDIV
POSTDIV $03 (default target f
CPU
PLLCLK
PLLCLK
CPU
7-32. Disable PLL Lock interrupt (LOCKIE=0) before going into Stop Mode.
execution
f
VCORST
Startup from Reset
Stop Mode using PLLCLK as Bus Clock
$1F (default target f
reset state
768 cycles
) (
STOP instruction
Figure 7-32. Stop Mode using PLLCLK as Bus Clock
wakeup
Figure 7-31. Startup of clock system after Reset
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
PLL
VCO
=f
vector fetch, program execution
=64MHz)
VCO
/4 = 16MHz)
t
STP_REC
f
PLL
increasing
t
lock
interrupt
t
lock
Figure
continue execution
f
7-31.
PLL
=16MHz
example change
of POSTDIV
$01
Freescale Semiconductor
f
PLL
=32 MHz