sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 80

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

1
1
Port Integration Module (S12HYPIMV1)
2.3.15
80
Address 0x0241
In order TIM input capture to be function correctly, the corresponding DDRT bit should be set to 0
Read: Anytime
Write:Never, writes to this register have no effect.
Field
Field
PTIT
Reset
PTT
PTT
7-4
3-0
7-0
W
R
Port T general purpose input/output data—Data Register, LCD segment driver output, TIM0 output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin. If the associated data direction bit is set to 1, a read
returns the value of the port register bit, otherwise the buffered pin input state is read.
Port T general purpose input/output data—Data Register, LCD segment driver output, TIM1 output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin. If the associated data direction bit is set to 1, a read
returns the value of the port register bit, otherwise the buffered pin input state is read.
Port T input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
• The LCD segment driver output takes precedence over the TIM0 and general purpose I/O function if related LCD
• The TIM0 output function takes precedence over the general purpose I/O function if the related channel is
• The LCD segment driver output takes precedence over the TIM1 and general purpose I/O function if related LCD
• The TIM1 output function takes precedence over the general purpose I/O function if the related channel is
PTIT7
Port T Input Register (PTIT)
segment is enabled
enabled.
segment is enabled
enabled.
u
7
1
1
= Unimplemented or Reserved
PTIT6
u
6
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-13. PTIT Register Field Descriptions
Table 2-12. PTT Register Field Descriptions
Figure 2-13. Port T Input Register (PTIT)
PTIT5
u
5
PTIT4
u
4
Description
Description
u = Unaffected by reset
PTIT3
3
u
PTIT2
u
2
Freescale Semiconductor
PTIT1
u
1
Access: User read
PTIT0
u
0
1