sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 451

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Figure 12-26
after the reset is low but is not preceded by three high samples that would qualify as a falling edge.
Depending on the timing of the start bit search and on the data, the frame may be missed entirely or it may
set the framing error flag.
In
noise flag but does not reset the RT clock. In start bits only, the RT8, RT9, and RT10 data samples are
ignored.
12.4.6.4
If the data recovery logic does not detect a logic 1 where the stop bit should be in an incoming frame, it
sets the framing error flag, FE, in SCI status register 1 (SCISR1). A break character also sets the FE flag
because a break character has no stop bit. The FE flag is set at the same time that the RDRF flag is set.
Freescale Semiconductor
Figure
RT Clock Count
RT Clock Count
Reset RT Clock
Reset RT Clock
RT Clock
RT Clock
Samples
Samples
12-27, a noise burst makes the majority of data samples RT8, RT9, and RT10 high. This sets the
RXD
RXD
shows a burst of noise near the beginning of the start bit that resets the RT clock. The sample
Framing Errors
1
1
1
1
1
1
1
1
1
1
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Figure 12-26. Start Bit Search Example 5
Figure 12-27. Start Bit Search Example 6
1
1
1
1
1
1
1
1
0
0
0
0
0
1
Start Bit
0
Start Bit
1
1
0
0
0
No Start Bit Found
Serial Communication Interface (S12SCIV5)
1
0
0
0
0
0
0
LSB
LSB
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