sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 737

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
A.3.1.13
The maximum set field margin level time is given by:
A.3.1.14
The time required to Erase Verify D-Flash for a given number of words N
A.3.1.15
D-Flash programming time is dependent on the number of words being programmed and their location
with respect to a row boundary since programming across a row boundary requires extra steps. The D-
Flash programming time is specified for different cases: 1,2,3,4 words and 4 words across a row boundary.
The typical D-Flash programming time is given by the following equation, where N
of words; BC=0 if no row boundary is crossed and BC=1 if a row boundary is crossed:
The maximum D-Flash programming time is given by:
A.3.1.16
Typical D-Flash sector erase times, expected on a new device where no margin verify fails occur, is given
by:
Maximum D-Flash sector erase times is given by:
The D-Flash sector erase time is ~5ms on a new device and can extend to ~20ms as the flash is cycled.
Freescale Semiconductor
t
t
=
t
t
dcheck
dera
dera
350
t
t
5025
20100
dpgm
dpgm
--------------------- -
f
Set Field Margin Level (FCMD=0x0E)
NVMBUS
Erase Verify D-Flash Section (FCMD=0x10)
450
Program D-Flash (FCMD=0x11)
Erase D-Flash Sector (FCMD=0x12)
1
------------------ -
f
+
NVMOP
------------------ -
f
N
14
NVMOP
14
1
W
1
+
+
+
--------------------- -
f
54 N
54 N
NVMBUS
+
700
3400
1
W
W
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
--------------------- -
f
NVMBUS
+
+
--------------------- -
f
NVMBUS
1
14 BC
14 BC
1
------------------ -
f
------------------ -
f
NVMOP
NVMOP
1
1
+
+
500
500
+
+
525 N
750 N
W
W
+
+
W
100 BC
100 BC
is given by:
W
denotes the number
Electrical Characteristics
--------------------- -
f
--------------------- -
f
NVMBUS
NVMBUS
1
1
737

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