sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 119

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1
1
1
2.3.78
2.3.79
Freescale Semiconductor
Address 0x0295
Address 0x0296
When change SRRU from non-zero value to zero value or vice versa, It will need to wait about 300 nanoseconds delay before
the slew rate control to be real function as setting. When enter STOP, to save the power, the slew rate control will be force to off
state. After wakeup from STOP, it will also need to wait about 300 nanoseconds before slew rate control to be function as setting.
Read: Anytime.
Write: Anytime.
Read: Anytime.
Write: Anytime.
PPSU
SRRU
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
Port U pull device select—Determine pull device polarity on input pins
This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting a pull-up
or pull-down device if enabled.
1 A pull-down device is connected to the associated Port U pin, if enabled by the associated bit in register PERU and
0 A pull-up device is connected to the associated Port U pin, if enabled by the associated bit in register PERU and
Port U Slew Rate Register—Determine the slew rate on the pins
1 Enable the slew rate control and disables the digital input buffer
0 Disable the slew rate control and enable the digital input buffer
SRRU7
PPSU7
Port U Polarity Select Register (PPSU)
Port U Slew Rate Register(SRRU)
if the port is used as input.
if the port is used as input.
0
0
7
7
PPSU6
SRRU6
0
0
6
6
Figure 2-77. Port U Polarity Select Register (SRRU)
Figure 2-76. Port U Polarity Select Register (PPSU)
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-67. SRRU Register Field Descriptions
Table 2-66. PPSU Register Field Descriptions
SRRU5
PPSU5
0
0
5
5
SRRU4
PPSU4
0
0
4
4
Description
Description
SRRU3
PPSU3
3
0
3
0
1
SRRU2
PPSU2
Port Integration Module (S12HYPIMV1)
0
0
2
2
SRRU1
PPSU1
Access: User read/write
Access: User read/write
0
0
1
1
PPSU0
SRRU0
0
0
0
0
119
1
1

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