sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 437

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
12.4
This section provides a complete functional description of the SCI block, detailing the operation of the
design from the end user perspective in a number of subsections.
Figure 12-14
communication between the CPU and remote devices, including other CPUs. The SCI transmitter and
receiver operate independently, although they use the same baud rate generator. The CPU monitors the
status of the SCI, writes the data to be transmitted, and processes received data.
Freescale Semiconductor
SBR12:SBR0
Clock
RXD
Bus
Decoder
Functional Description
Infrared
Receive
Baud Rate
Generator
IREN
shows the structure of the SCI module. The SCI allows full duplex, asynchronous, serial
Ir_RXD
T8
R16XCLK
R32XCLK
16
SCRXD
TNP[1:0]
Shift Register
and Wakeup
Data Format
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Transmit
Encoder
Infrared
SCI Data
Transmit
Transmit
Register
Receive
Control
Control
Control
Figure 12-14. Detailed SCI Block Diagram
SCTXD
IREN
Shift Register
SCI Data
Ir_TXD
Receive
Register
LOOPS
LOOPS
RSRC
WAKE
RSRC
RWU
SBK
RE
ILT
PE
PT
TE
M
RXD
TDRE
RDRF
TCIE
TIE
IDLE
RAF
RIE
Break Detect
TC
LIN Transmit
BERRM[1:0]
OR
NF
Active Edge
R8
FE
PF
BKDFE
Collision
Detect
Detect
RXEDGIE
Serial Communication Interface (S12SCIV5)
ILIE
BKDIE
BERRIF
RXEDGIF
BKDIF
BERRIE
TDRE
TC
TXD
IDLE
SCI
Interrupt
Request
437

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