sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 749

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
In
Freescale Semiconductor
Num
1. SPI on non-motor pad ports (Port S or Por t H)
2. SPI on Port V with slew rate control disable. All the SPI pins slew rate control should be disabled.
3. SPI on Port V with slew rate control enabled. All the SPI pins slew rate control should be enabled.
4. MIN(16, f
5. MAX(62.5, 2*t
Table A-26
10
11
12
13
1
1
2
3
4
5
6
9
C
D
D
D
D
D
D
D
D
D
D
D
D
bus
/2) means select minimum frequency value from 16MHZ and f
the timing characteristics for master mode are listed.
SCK frequency
SCK period
Enable lead time
Enable lag time
Clock (SCK) high or low
time
Data setup time (inputs)
Data hold time (inputs)
Data valid after SCK edge
Data valid after SS fall
(CPHA = 0)
Data hold time (outputs)
Rise and fall time inputs
Rise and fall time outputs
bus
) means select the maximum period value from 62.5ns and 2*t
Characteristic
Table A-26. SPI Master Mode Timing Characteristics
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Symbol
t
t
t
wsck
t
f
t
t
lead
vsck
t
t
t
t
sck
sck
t
vss
lag
su
ho
rfo
hi
rfi
MAX(1250, 2*t
MAX(62.5, 2*t
MAX(100, 2*t
f
bus
220
220
Min
8
8
20
/2048
1,2
1,2
3
3
bus
bus
bus
)
)
)
2
1
3
bus
/2MHZ. same for the other MIN(X,Y)
bus
Typ
1/2
1/2
1/2
ns. same for the other MAX(X,Y)
MIN(16, f
MIN(10,f
MIN(0.8,f
15
220
Max
8
8
85
85
15
1,2
1,2
Electrical Characteristics
1,2
bus
bus
bus
3
3
3
t
bus
/2)
/2)
/2)
(1)
(2)
(3)
MHZ
Unit
t
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
sck
sck
sck
749

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