sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 287

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

8.3.2
This section describes in address order all the ADC12B8C registers and their individual bits.
8.3.2.1
Writes to this register will abort current conversion sequence.
Read: Anytime
Write: Anytime, in special modes always write 0 to Reserved Bit 7.
Freescale Semiconductor
Module Base + 0x0000
WRAP[3-0]
Reset
Field
3-0
W
R
Reserved
Register Descriptions
Wrap Around Channel Select Bits — These bits determine the channel for wrap around when doing
multi-channel conversions. The coding is summarized in
ATD Control Register 0 (ATDCTL0)
0
7
WRAP3 WRAP2 WRAP1 WRAP0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
= Unimplemented or Reserved
0
0
6
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Figure 8-3. ATD Control Register 0 (ATDCTL0)
Table 8-2. Multi-Channel Wrap Around Coding
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 8-1. ATDCTL0 Field Descriptions
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
5
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
4
Multiple Channel Conversions (MULT = 1)
Description
Wraparound to AN0 after Converting
Analog-to-Digital Converter (ADC12B8CV1) Block Description
WRAP3
Table
1
3
8-2.
Reserved
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN7
AN7
AN7
AN7
AN7
AN7
AN7
AN7
WRAP2
1
1
2
WRAP1
1
1
WRAP0
1
0
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