sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 113

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

1
1
1
2.3.67
2.3.68
Freescale Semiconductor
Address 0x028A
Address 0x028B
In order to enable the key wakup function, need to disable the LCD FP function first
Read: Anytime.
Write: Anytime.
Read: Anytime.
Write: Anytime.
Read: Anytime.
Field
Field
PIES
PIFT
Reset
Reset
6-5
6-5
W
W
R
R
Port T interrupt flag—
Each flag is set by an active edge on the associated input pin. This could be a rising or a falling edge based on the
state of the PPST register. To clear this flag, write logic level 1 to the corresponding bit in the PIFT register. Writing
a 0 has no effect.
1 Active edge on the associated bit has occurred (an interrupt will occur if the associated enable bit is set).
0 No active edge pending.
Port S interrupt enable—
This register disables or enables on a per-pin basis the edge sensitive external interrupt associated with Port S.
1 Interrupt is enabled.
0 Interrupt is disabled (interrupt flag masked).
Port S Interrupt Enable Register (PIES)
Port S Interrupt Flag Register (PIFS)
0
0
0
0
7
7
PIES6
PIFS6
1
0
0
6
6
Figure 2-65. Port S Interrupt Enable Register (PIES)
Figure 2-66. Port S Interrupt Flag Register (PIFS)
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-56. PIES Register Field Descriptions
Table 2-55. PIFT Register Field Descriptions
PIES5
PIFS5
0
0
5
5
0
0
0
0
4
4
Description
Description
3
0
0
3
0
0
Port Integration Module (S12HYPIMV1)
0
0
0
0
2
2
Access: User read/write
Access: User read/write
0
0
0
0
1
1
0
0
0
0
0
0
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