sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 70

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Port Integration Module (S12HYPIMV1)
1
2
70
Always “1” on Port A, B, and always “0” on AD.
Applicable only on Port T, S, R and AD.
DDR
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
IO
0
1
0
1
0
1
0
1
x
x
x
x
x
x
x
All register bits in this module are completely synchronous to internal
clocks during a register read.
Figure of port data registers also display the alternative functions if
applicable on the related pin as defined in
denote the availability of the function when using a specific routing option.
Figures of module routing registers also display the module instance or
module channel associated with the related routing bit.
RDR
0
0
1
1
0
0
1
1
x
x
x
x
x
x
x
PE
0
1
1
0
0
1
1
x
x
x
x
x
x
x
x
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-3. Pin Configuration Summary
PS
x
0
1
0
1
0
1
x
x
x
x
0
1
0
1
1
IE
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
2
NOTE
NOTE
NOTE
Input
Input
Input
Input
Input
Input
Input
Output, full drive to 0
Output, full drive to 1
Output, reduced drive to 0
Output, reduced drive to 1
Output, full drive to 0
Output, full drive to 1
Output, reduced drive to 0
Output, reduced drive to 1
Table
Function
2-1. Names in brackets
Disabled
Pull Up
Pull Down
Disabled
Disabled
Pull Up
Pull Down
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Pull Device
Freescale Semiconductor
Disabled
Disabled
Disabled
Falling edge
Rising edge
Falling edge
Rising edge
Disabled
Disabled
Disabled
Disabled
Falling edge
Rising edge
Falling edge
Rising edge
Interrupt

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