sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 254

no-image

sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
S12 Clock, Reset and Power Management Unit (S12CPMU) Block Description
7.3.2.16
The CPMUAPITR register configures the trimming of the API time-out period.
Read: Anytime
Write: Anytime
254
0x02F3
APITR[5:0]
After de-assert of System Reset a value is automatically loaded from the Flash memory.
Reset
Field
7–2
W
R
APITR5
Autonomous Periodical Interrupt Period Trimming Bits — See
APITR[5:0] value represents a signed number influencing the ACLK period time.
Autonomous Periodical Interrupt Trimming Register (CPMUAPITR)
Figure 7-20. Autonomous Periodical Interrupt Trimming Register (CPMUAPITR)
F
7
APITR4
APITR[5]
APITR[4]
APITR[3]
APITR[2]
APITR[1]
APITR[0]
F
6
Bit
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 7-16. CPMUAPITR Field Descriptions
Table 7-17. Trimming Effect of APITR
Increases period
Decreases period less than APITR[5] increased it
Decreases period less than APITR[4]
Decreases period less than APITR[3]
Decreases period less than APITR[2]
Decreases period less than APITR[1]
APITR3
F
5
APITR2
F
4
Trimming Effect
Description
APITR1
F
3
Table 7-17
APITR0
F
2
for trimming effects. The
Freescale Semiconductor
0
0
1
0
0
0

Related parts for sc9s12hy64j0vllr