sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 110

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

1
1
Port Integration Module (S12HYPIMV1)
2.3.60
2.3.61
110
Address 0x0283
Address 0x0284
Read: Anytime.
Write: Anytime.
Read: Anytime.
Write: Anytime.
RDRR
PERR
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
Port R reduced drive—Select reduced drive for outputs
This register configures the drive strength of output pins 7 through 0 as either full or reduced. If a pin is used as input
this bit has no effect.
1 Reduced drive selected (1/6 of the full drive strength).
0 Full drive strength enabled.
Port R pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset all pull devices are enabled.
1 Pull device enabled.
0 Pull device disabled.
RDRR7
PERR7
Port R Reduced Drive Register (RDRR)
Port R Pull Device Enable Register (PERR)
0
1
7
7
RDRR6
PERR6
Figure 2-59. Port R Pull Device Enable Register (PERR)
0
1
6
6
Figure 2-58. Port R Reduced Drive Register (RDRR)
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-50. RDRR Register Field Descriptions
Table 2-51. PERR Register Field Descriptions
RDRR5
PERR5
0
1
5
5
RDRR4
PERR4
0
1
4
4
Description
Description
RDRR3
PERR3
3
0
3
1
RDRR2
PERR2
0
1
2
2
Freescale Semiconductor
RDRR1
PERR1
Access: User read/write
Access: User read/write
0
1
1
1
RDRR0
PERR0
0
1
0
0
1
1