sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 522

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
32 KByte Flash Module (S12FTMRC32K1V1)
15.3.2.1
The FCLKDIV register is used to control timed events in program and erase algorithms.
All bits in the FCLKDIV register are readable, bit 7 is not writable, bit 6 is write-once-hi and controls the
writability of the FDIV field.
522
FDIVLD
Address
Offset Module Base + 0x0000
Reset
& Name
0x0011
0x0012
0x0013
FRSV5
FRSV6
FRSV7
Field
7
W
R
FDIVLD
Clock Divider Loaded
0 FCLKDIV register has not been written since the last reset
1 FCLKDIV register has been written since the last reset
Flash Clock Divider Register (FCLKDIV)
0
7
W
W
W
R
R
R
The FCLKDIV register must never be written to while a Flash command is
executing (CCIF=0). The FCLKDIV register is writable during the Flash
reset sequence even though CCIF is clear.
= Unimplemented or Reserved
7
0
0
0
FDIVLCK
Figure 15-4. FTMRC32K1 Register Summary (continued)
0
6
Figure 15-5. Flash Clock Divider Register (FCLKDIV)
= Unimplemented or Reserved
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
6
0
0
0
Table 15-6. FCLKDIV Field Descriptions
0
5
5
0
0
0
CAUTION
0
4
Description
4
0
0
0
0
3
FDIV[5:0]
3
0
0
0
0
2
2
0
0
0
Freescale Semiconductor
0
1
1
0
0
0
0
0
0
0
0
0

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