LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 99

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

31
0
0
0
0
0
0
0
Register: 0x2E
Subsystem ID (SSID)
Read Only
SSID
Register: 0x30
Expansion ROM Base Address
Read/Write
ERBA
Configuration Registers
LSI53C825AE
LSI53C825A
0
15
1
0
0
1
0
0
0
1
0
0
1
0
Subsystem ID
This register supports subsystem identification, which
has a default value of 0x1000 in the LSI53C825AE
(Section 3.2, “MAD Bus
register, connect a 4.7 k
pin and V
MAD[6] and MAD[4] pins have internal pull-up resistors
and are sensed shortly after the deassertion of chip
reset. In revisions before Revision G of the LSI53C825A,
the MAD[6] and MAD[4] pins do not support the SSID
and SSVID configurations, and only values of 0x0000 can
be found in the Subsystem Data register.
Expansion ROM Base Address
This four-byte register handles the base address and size
information for expansion ROM. It functions exactly like
the
(Memory)
is different. The upper 21 bits correspond to the upper
21 bits of the expansion ROM base address.
0
0
Base Address Zero (I/O)
0
0
0
ERBA
0
0
0
SS
registers, except that the encoding of the bits
0
and leave the MAD[4] pin unconnected. The
0
0
0
0
0
0
SSID
0
0
0
0
Programming”). To write to this
0
0
0
resistor between the MAD[6]
0
and
0
0
0
Base Address One
0
0
0
0
0
0
0
0
0
0
0
0
0
0
[15:0]
[31:0]
0
4-11
0
0
0
0
0