LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 40

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

2-16
Table 2.2
To use one of the configurations mentioned above in a host adapter
board design, put 4.7 k
corresponding to the available memory space. For example, to connect
to a 32 Kbyte external ROM, use pull-downs on MAD3 and MAD2. If the
external memory interface is not used, then no external resistors are
necessary since there are internal pull-ups on the MAD bus. The internal
pull-up resistors are disabled when external pull-down resistors are
detected, to reduce current drain.
The LSI53C825A allows the system to determine the size of the available
external memory using the
PCI configuration space. For more information on how this works, refer
to the PCI specification or the
description in
MAD0 is the slow ROM pin. When pulled down, it enables two extra clock
cycles of data access time to allow use of slower memory devices. The
external memory interface also supports updates to flash memory. The
12 V power supply for flash memory, V
the GPIO4 pin and the GPIO4 control bit. For more information on the
GPIO4 pin, refer to
Functional Description
MAD[3:1]
000
001
010
011
100
101
110
111
External Memory Support
Chapter 3, “Signal Descriptions.”
Chapter 4, “Registers.”
Available Memory Space
16 Kbytes
32 Kbytes
64 Kbytes
128 Kbytes
256 Kbytes
512 Kbytes
1024 Kbytes
No external memory present
pull-down resistors on the MAD pins
Expansion ROM Base Address
Expansion ROM Base Address
PP
, is enabled and disabled with
register in
register