LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 69

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LSI53C825AJ

Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53C825AJ

Lead Free Status / RoHS Status
Not Compliant
The Chained Block Move instruction is illustrated in
Figure 2.6
CHMOV 5, 3 when Data_Out
Moves five bytes from address 0x03 in the host memory to the SCSI bus.
Bytes 0x03, 0x04, 0x05, and 0x06 are moved and byte 0x07 remains in
the low-order byte of the
is combined with the first byte of the following MOVE instruction.
Move 5, 9 when Data_Out
Moves five bytes from address 0x09 in the host memory to the SCSI bus.
PCI Cache Mode
0x0B 0x0A 0x09 0x08
0x0F 0x0E 0x0D 0x0C
0x03 0x02 0x01 0x00
0x07 0x06 0x05 0x04
0x13 0x12 0x11 0x10
Host Memory
32 Bits
Block Move and Chained Block Move Instructions
SCSI Output Data Latch (SODL)
00
04
08
0C
10
0x0D 0x0C
0x0B 0x0A
0x04 0x03
0x06 0x05
0x09 0x07
SCSI Bus
16 Bits
Figure
register and
2.6.
2-45

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