LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 21

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

1.4.5 Flexibility
1.4.6 Reliability
The LSI53C825A contains these flexibility features:
The LSI53C825A contains these reliability features:
LSI53C825A Benefits Summary
High level programming interface (SCSI SCRIPTS)
Programs local memory bus Flash memory
Big/little endian support
Selectable 88-byte or 536-byte DMA FIFO for backward compatibility
Tailored SCSI sequences execute from main system RAM or internal
SCRIPTS RAM
Flexible programming interface to tune I/O performance or to adapt
to unique SCSI devices
Support for changes in the logical I/O interface definition
Low level access to all registers and all SCSI bus signals
Fetch, Master, and Memory Access control pins
Separate SCSI and system clocks
Selectable IRQ pins disable bit
32 additional scratch pad registers
Ability to route system clock to SCSI clock
2 kV ESD protection on SCSI signals
Typical 300 mV SCSI bus hysteresis
Protection against bus reflections due to impedance mismatches
Controlled bus assertion times (reduces RFI, improves reliability, and
eases FCC certification)
Latch-up protection greater than 150 mA
Voltage feed-through protection (minimum leakage current through
SCSI pads)
25% of pins are power and ground
Power and ground isolation of I/O pads and internal chip logic
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