LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 219

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LSI53C825AJ

Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53C825AJ

Lead Free Status / RoHS Status
Not Compliant
IF
JMP
CP
Transfer Control Instructions
CD
Interrupt-on-the-Fly
When this bit is set, the interrupt instruction does not halt
the SCRIPTS processor. Once the interrupt occurs, the
Interrupt-on-the-Fly bit
asserted.
Jump If True/False
This bit determines whether the LSI53C825A branches
when a comparison is true or when a comparison is false.
This bit applies to phase compares, data compares, and
carry tests. If both the Phase Compare and Data
Compare bits are set, then both compares must be true
to branch on a true condition. Both compares must be
false to branch on a false condition.
Bit 19
0
0
1
1
Compare Data
When this bit is set, the first byte received from the SCSI
data bus (contained in the
(SFBR)
Compared Field in the Transfer Control instruction. The
Wait for Valid Phase bit controls when this compare
occurs. The Jump if True/False bit determines the
condition (true or false) to branch on.
Compare Phase
When the LSI53C825A is in Initiator mode, this bit
controls phase compare operations. When this bit is set,
the SCSI phase signals (latched by SREQ/) are
compared to the Phase Field in the Transfer Control
instruction. If they match, the comparison is true. The
Wait for Valid Phase bit controls when the compare
occurs. When the LSI53C825A is operating in Target
mode and this bit is set, it tests for an active SCSI SATN/
signal.
register) is compared with the Data to be
Result of
Compare
False
True
False
True
(Interrupt Status
Action
Jump Taken
No Jump
No Jump
Jump Taken
SCSI First Byte Received
(ISTAT), bit 2) is
5-35
20
19
18
17

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