LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 105
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LSI53C825AJ
Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet
1.LSI53C825AJ.pdf
(306 pages)
Specifications of LSI53C825AJ
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PEN
R
PWS
Register: 0x46
Bridge Support Extensions (PMCSR_BSE)
Read Only
BSE[7:0]
Register: 0x47
Data
Read Only
DATA[7:0]
Configuration Registers
7
0
7
0
0
0
PME Enable
The LSI53C825A always returns a zero for this bit to
indicate that PME assertion is disabled.
Reserved
Power State
Bits [1:0] are used to determine the current power state
for the LSI53C825A. They are used to place the
LSI53C825A in a new power state. Power states are
defined as:
0b00
0b01
0b10
0b11
Bridge Support Extensions
This register applies to the LSI53C825A only and can
support PCI bridge specific functionality, if required. The
default value always returns 0x00.
Data
This register applies to the LSI53C825AE only and
provides an optional mechanism for the function to report
state dependent operating data. The LSI53C825AE
returns 0x00 as the default value.
0
0
D0
Reserved
Reserved
D3 hot
0
0
DATA
BSE
0
0
0
0
0
0
0
0
0
0
[7:2]
[1:0]
[7:0]
[7:0]
4-17
8
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