LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 118

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

4-30
Register: 0x04 (0x84)
SCSI Chip ID (SCID)
Read/Write
R
RRE
SRE
R
ENC[3:0]
Registers
R
7
x
Note:
RRE
6
0
It is important that these bits are set to the proper values
to guarantee that the LSI53C825A meets the SCSI timings
as defined by the ANSI specification.
For additional information on how the synchronous transfer
rate is determined, refer to
tion.”
Reserved
Enable Response to Reselection
When this bit is set, the LSI53C825A is enabled to
respond to bus-initiated reselection at the chip ID in the
Response ID Zero (RESPID0)
(RESPID1)
automatically reconfigure itself to the initiator mode as a
result of being reselected.
Enable Response to Selection
When this bit is set, the LSI53C825A is able to respond
to bus-initiated selection at the chip ID in the
ID Zero (RESPID0)
registers. Note that the LSI53C825A does not
automatically reconfigure itself to target mode as a result
of being selected.
Reserved
Encoded Chip SCSI ID
These bits are used to store the LSI53C825A encoded
SCSI ID. This is the ID which the chip asserts when
arbitrating for the SCSI bus. The IDs that the
LSI53C825A responds to when selected or reselected
are configured in the
Response ID One (RESPID1)
the 16 possible IDs, in descending order is:
SRE
5
0
registers. Note that the LSI53C825A does not
R
4
x
and
Response ID Zero (RESPID0)
3
0
Response ID One (RESPID1)
Chapter 2, “Functional Descrip-
registers. The priority of
and
0
ENC[3:0]
Response ID One
0
Response
0
0
[3:0]
and
7
6
5
4