LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 79

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

3.1.4 Arbitration Signals
Table 3.5
3.1.5 Error Reporting Signals
Table 3.6
Name Pin No. Type Description
REQ/
GNT/
Name
PERR/
SERR/
Pin No.
148
147
143
24
Arbitration Signals
Error Reporting Signals
S/T/S Parity Error may be pulsed active by an agent that detects a data parity
Type
O
I
O
Table 3.5
Table 3.6
PCI Bus Interface Signals
Request indicates to the arbiter that this agent desires use of the PCI bus.
This is a point-to-point signal. Every master has its own REQ/.
Grant indicates to the agent that access to the PCI bus has been granted.
This is a point-to-point signal. Every master has its own GNT/.
Description
error. PERR/ can be used by any agent to signal data corruptions.
System Error is an open drain output pin used to report address parity
errors. On detection of a PERR/ pulse, the central resource may generate
a nonmaskable interrupt to the host CPU, which often implies the system
is unable to continue operation once error processing is complete.
describes the signals for the Arbitration Signals group:
describes the signals for the Error Reporting Signals group:
3-9