LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 222

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

5.7.2 Read/Write System Memory from SCRIPTS
5.7.3 Second Dword
5.7.4 Third Dword
5-38
TC[23:0]
By using the Memory Move instruction, single or multiple register values
are transferred to or from system memory.
Because the LSI53C825A responds to addresses as defined in the
Address Zero (I/O)
accessed during a Memory Move operation if the source or destination
address decodes to within the chip’s register space. If this occurs, the
register indicated by the lower seven bits of the address is taken as the
data source or destination. In this way, register values are saved to
system memory and later restored, and SCRIPTS can make decisions
based on data values in system memory.
The
therefore not by a Memory Move. However, it can be loaded using
SCRIPTS Read/Write operations. To load the SFBR with a byte stored
in system memory, first move the byte to an intermediate LSI53C825A
register (for example, a SCRATCH register), and then to the
Byte Received
The same address alignment restrictions apply to register access
operations as to normal memory-to-memory transfers.
SCSI SCRIPTS Instruction Set
SCSI First Byte Received (SFBR)
(SFBR).
Transfer Counter
The number of bytes to transfer is stored in the lower
24 bits of the first instruction word.
DSPS Register
These bits contain the source address of the Memory
Move.
TEMP Register
These bits contain the destination address for the
Memory Move.
Figure 5.6
or
Base Address One (Memory)
illustrates the Memory Move instruction.
is not writable using the CPU, and
registers, it can be
SCSI First
[23:0]
[31:0]
[31:0]
Base