LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 162
LSI53C825AJ
Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet
1.LSI53C825AJ.pdf
(306 pages)
Specifications of LSI53C825AJ
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4-74
R
STO
GEN
HTH
Register: 0x42 (0xC2)
SCSI Interrupt Status Zero (SIST0)
Read Only
Reading the
status of the various interrupt conditions, whether they are enabled in the
SCSI Interrupt Enable Zero (SIEN0)
occurrence of the corresponding condition. Reading the SIST0 clears the
interrupt status.
Reading this register clears any bits that are set at the time the register
is read, but does not necessarily clear the register because additional
interrupts may be pending (the LSI53C825A stack interrupts). SCSI
interrupt conditions are individually masked through the
Enable Zero (SIEN0)
Registers
M/A
7
0
CMP
SCSI Interrupt Status Zero (SIST0)
6
0
Reserved
Selection or Reselection Time-out
The SCSI device which the LSI53C825A is attempting to
select or reselect does not respond within the
programmed time-out period. See the description of the
SCSI Timer Zero (STIME0)
information on the time-out timer.
General Purpose Timer Expired
The general purpose timer is expired. The time measured
is the time between enabling and disabling of the timer.
See the description of the
register, bits [3:0], for more information on the general
purpose timer.
Handshake-to-Handshake Timer Expired
The handshake-to-handshake timer is expired. The time
measured is the SCSI Request-to-Request (target) or
Acknowledge-to-Acknowledge (initiator) period. See the
description of the
bits [7:4], for more information on the handshake-to-
handshake timer.
SEL
register.
5
0
RSL
4
0
SCSI Timer Zero (STIME0)
register or not. Each bit set indicates
SGE
3
0
SCSI Timer One (STIME1)
register bits [3:0] for more
UDC
2
0
register returns the
SCSI Interrupt
RST
1
0
register,
PAR
0
0
[7:3]
2
1
0
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