LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 103
LSI53C825AJ
Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet
1.LSI53C825AJ.pdf
(306 pages)
Specifications of LSI53C825AJ
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Register: 0x41
Next Item Pointer
Read Only
NIP
Register: 0x42
Power Management Capabilities
Read Only
This register applies to the LSI53C825AE only and indicates the power
management capabilities.
PMES[4:0]
D2S
D1S
Configuration Registers
15
0
7
0
PMES[4:0]
0
0
0
0
Next_Item_Ptr
This register describes the location of the next item in the
function’s capability list. The default value for this register
is 0x00, indicating that power management is the last
capability in the linked list of extended capabilities. This
register applies to the LSI53C825AE only.
PME Support
This field is always set to 00000b because the
LSI53C825AE does not provide a PME signal.
D2 Support
This device does not support the D2 power management
state.
D1 Support
This device does not support the D1 power management
state.
11
0
D2S D1S
10
0
0
9
0
8
0
0
NIP
R
0
6
0
0
DSI APS PMEC
5
0
0
4
0
3
0
0
2
1
VER[2:0]
1
[15:11]
0
0
[7:0]
4-15
0
1
10
9
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