LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 73

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

Figure 3.2
DEVSEL/
FRAME/
C_BE3/
C_BE2/
C_BE1/
C_BE0/
PERR/
STOP/
IDSEL
TRDY/
IRDY/
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
V
V
V
PAR/
AD9
AD8
AD7
V
V
V
V
V
V
V
V
DD-I
DD-I
DD-I
SS
SS
SS
SS
SS
SS
SS
SS
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
LSI53C825AJ Pin Diagram
The PCI/SCSI pin definitions are organized into the following functional
groups: System, Address/Data, Interface Control, Arbitration, Error
Reporting, SCSI, and Optional Interface. A slash (/) at the end of the
signal name indicates that the active state occurs when the signal is at
a LOW voltage. When the slash is absent, the signal is active at a HIGH
voltage.
SCSI I/O Processor
Quad Flat Pack
(Top View)
160-pin
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
SDIR7
SDIRP0
V
SD12/
SD13/
SD14/
V
SD15/
SDP1/
SD0/
SD1/
V
SD2/
SD3/
SD4/
SD5/
V
SD6/
SD7/
SDP0/
SATN/
V
SBSY/
SACK/
SRST/
SMSG/
SSEL/
V
SC_D/
SREQ/
SI_O/
SD8/
V
SD9/
SD10/
SD11/
V
SDIR8
SDIR9
SDIR10
DD
SS-S
SS-S
SS-S
SS-S
SS-S
SS-S
DD
3-3