LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 46

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

Table 2.3
Table 2.4
2-22
BIt Name
Status of SCSI Parity
Signal
SCSI SDP1 Signal
Latched SCSI Parity
Master Parity Error
Enable
Master Data Parity Error
Master Data Parity Error
Interrupt Enable
EPC
0
0
1
1
1. Key:
2. This table only applies when the Enable Parity Checking bit is set.
EPC = Enable Parity Checking (bit 3,
ASEP = Assert SCSI Even Parity (bit 2,
Bits Used for Parity Control and Generation (Cont.)
SCSI Parity Control
AESP
0
1
0
1
Functional Description
Location
SCSI Status Zero
(SSTAT0), Bit 0
SCSI Status Two
(SSTAT2), Bit 0
SCSI Status Two
(SSTAT2), Bit 3
and
One
Bit 3
Chip Test Four
(CTEST4), Bit 3
DMA Status
(DSTAT), Bit 6
DMA Interrupt
Enable
Bit 6
SCSI Status
(SSTAT1),
Description
Does not check for parity errors. Parity is generated when sending
SCSI data. Asserts odd parity when sending SCSI data.
Does not check for parity errors. Parity is generated when sending
SCSI data. Asserts even parity when sending SCSI data.
Checks for odd parity on SCSI data received. Parity is generated
when sending SCSI data. Asserts odd parity when sending SCSI
data.
Checks for odd parity on SCSI data received. Parity is generated
when sending SCSI data. Asserts even parity when sending SCSI
data.
(DIEN),
SCSI Control Zero
SCSI Control One
Description
This status bit represents the active HIGH current state
of the SCSI SDP0 parity signal.
This bit represents the active HIGH current state of the
SCSI SDP1 parity signal.
These bits reflect the SCSI odd parity signal
corresponding to the data latched into the
Data Latch (SIDL)
Enables parity checking during master data phases.
Set when the LSI53C825A as a master detects that a
target device has signaled a parity error during a data
phase.
By clearing this bit, a Master Data Parity Error will not
cause IRQ/ to be asserted, but the status bit will be set
in the
DMA Status (DSTAT)
(SCNTL0)).
(SCNTL1)).
register.
register.
SCSI Input