LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 48

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LSI53C825AJ

Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53C825AJ

Lead Free Status / RoHS Status
Not Compliant
2.4.8.1 Data Paths
2-24
The data path through the LSI53C825A is dependent on whether data is
being moved into or out of the chip, and whether SCSI data is being
transferred asynchronously or synchronously.
The following steps determine if any bytes remain in the data path when
the chip halts an operation:
Asynchronous SCSI Send –
Step 1. If the DMA FIFO size is set to 88 bytes, look at the
Step 2. Read bit 5 in the
Synchronous SCSI Send –
Step 1. If the DMA FIFO size is set to 88 bytes, look at the
Functional Description
(DFIFO)
if there are bytes left in the DMA FIFO. To make this calculation,
subtract the seven least significant bits of the
Counter (DBC)
(DFIFO)
between zero and 88.
If the DMA FIFO size is set to 536 bytes (using bit 5 of the
Test Five (CTEST5)
bits of the
value of the DMA FIFO Byte Offset Counter, which consists of
bits [1:0] in the
of the DMA FIFO register. AND the result with 0x3FF for a byte
count between zero and 536.
Two (SSTAT2)
SCSI Output Data Latch (SODL)
SSTAT0 or SSTAT2, then the least significant byte or the most
significant byte in the
is full, respectively. Checking this bit also reveals bytes left in
the
Move operation with an odd byte count.
(DFIFO)
if there are bytes left in the DMA FIFO. To make this calculation,
subtract the seven least significant bits of the
SCSI Output Data Latch (SODL)
and
and
register. AND the result with 0x7F for a byte count
DMA Byte Counter (DBC)
DMA Byte Counter (DBC)
DMA Byte Counter (DBC)
registers to determine if any bytes are left in the
Chip Test Five (CTEST5)
register from the 7-bit value of the
SCSI Status Zero (SSTAT0)
register), subtract the 10 least significant
SCSI Output Data Latch (SODL)
register. If bit 5 is set in the
register from the 10-bit
register from a Chained
registers and calculate
registers and calculate
register and bits [7:0]
and
DMA Byte
DMA Byte
SCSI Status
DMA FIFO
DMA FIFO
DMA FIFO
register
Chip

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