LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 187

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LSI53C825AJ

Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53C825AJ

Lead Free Status / RoHS Status
Not Compliant
5.2.1 Sample Operation
The following types of SCRIPTS instructions are implemented in the
LSI53C825A, as shown in
Table 5.1
Each instruction consists of two or three 32-bit words. The first 32-bit
word is always loaded into the
Counter (DBC)
Save (DSPS)
instructions, is loaded into the
indirect I/O or Move instruction, the first two 32-bit opcode fetches is
followed by one or two more 32-bit fetch cycles.
This sample operation describes execution of a SCRIPTS instruction for
a Block Move instruction.
High Level SCSI SCRIPTS Mode
Instruction
Block Move
I/O or Read/Write
Transfer Control
Memory Move
Load and Store
The host CPU, through programmed I/O, gives the
Pointer (DSP)
address in main memory that points to a SCSI SCRIPTS program
for execution.
SCRIPTS Instructions
register. The third word, used only by Memory Move
registers, the second into the
register (in the Operating Register file) the starting
Description
Block Move instruction moves data between the SCSI
bus and memory.
I/O or Read/Write instructions cause the LSI53C825A to
trigger common SCSI hardware sequences, or to move
registers.
Transfer Control instruction allows SCRIPTS instructions
to make decisions based on real time SCSI bus
conditions.
Memory Move instruction causes the LSI53C825A to
execute block moves between different parts of main
memory.
Load and Store instructions provide a more efficient way
to move data to/from memory from/to an internal register
in the chip without using the Memory Move instruction.
Table
Temporary (TEMP)
DMA Command (DCMD)
5.1:
DMA SCRIPTS Pointer
shadow register. In an
DMA SCRIPTS
and
DMA Byte
5-3

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