LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 216
LSI53C825AJ
Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet
1.LSI53C825AJ.pdf
(306 pages)
Specifications of LSI53C825AJ
Lead Free Status / RoHS Status
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Return Instruction
The LSI53C825A can do a true/false comparison of the
ALU carry bit, or compare the phase and/or data as
defined by the Phase Compare, Data Compare, and
True/False bit fields.
If the comparisons are true, it loads the
DMA SCRIPTS
Pointer (DSP)
register with the contents of the
DMA
SCRIPTS Pointer Save (DSPS)
register. That address
value becomes the address of the next instruction.
When a Return instruction is executed, the value stored
in the
Temporary (TEMP)
register is returned to the
DMA
SCRIPTS Pointer (DSP)
register. The LSI53C825A does
not check to see whether the Call instruction has already
been executed. It does not generate an interrupt if a
Return instruction is executed without previously
executing a Call instruction.
If the comparisons are false, the LSI53C825A fetches the
next instruction from the address pointed to by the
DMA
SCRIPTS Pointer (DSP)
register and the instruction
pointer is not modified.
Interrupt Instruction
The LSI53C825A can do a true/false comparison of the
ALU carry bit, or compare the phase and/or data as
defined by the Phase Compare, Data Compare, and
True/False bit fields.
If the comparisons are true, the LSI53C825A generates
an interrupt by asserting the IRQ/ signal.
The 32-bit address field stored in the
DMA SCRIPTS
Pointer Save (DSPS)
register can contain a unique
interrupt service vector. When servicing the interrupt, this
unique status code allows the Interrupt Service Routine
to quickly identify the point at which the interrupt
occurred.
The LSI53C825A halts and the
DMA SCRIPTS Pointer
(DSP)
register must be written to before starting any
further operation.
5-32
SCSI SCRIPTS Instruction Set
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