LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 16

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

1.2 Package and Feature Options
1-2
memory bus for local storage of the device’s BIOS ROM in flash memory
or standard EPROMs. The LSI53C825A supports big and little endian
byte addressing to accommodate a variety of data configurations. The
LSI53C825A supports programming of local FLASH memory for updates
to BIOS or SCRIPTS™ programs.
The LSI53C825A is a pin-for-pin replacement for the LSI53C825 PCI to
SCSI I/O processor, although some software enhancements are needed
to take advantage of the features in the LSI53C825A. The LSI53C825A
performs fast 8-bit or 16-bit SCSI transfers in Single-Ended (SE) or
differential mode, and improves performance by optimizing PCI bus
utilization.
The LSI53C825A integrates a high-performance SCSI core, a PCI bus
master DMA core, and the LSI Logic SCSI SCRIPTS processor to meet
the flexibility requirements of SCSI-3 and future SCSI standards. It is
designed to implement multithreaded I/O algorithms with a minimum of
processor intervention, solving the protocol overhead problems of
previous intelligent and nonintelligent adapter designs.
The LSI53C825A is fully supported by the LSI Logic Storage Device
Management System (SDMS™), a software package that supports the
Advanced SCSI Protocol Interface (ASPI) and the ANSI Common Access
Method (CAM). SDMS provides BIOS and driver support for hard disk,
tape, removable media products, and CD-ROM under the major PC
operating systems.
The LSI53C825A is packaged in a 160-pin plastic quad flat pack. The
device is also available, as the LSI53C825AJ, with additional pins that
support JTAG boundary scan testing. The JTAG boundary scan signals
replace the TESTIN, MAC/_TESTOUT, BIG_LIT/, and SDIRP1 pins. The
devices that have been upgraded to include the power management
features are the LSI53C825AE and LSI53C825AJE.
Introduction