MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 597
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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22.14.6.1 Memory Address Latch (MAL)
22.14.6.2 Breakpoint Address Base Registers
22.14.7 Breakpoint Address Mask Registers
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Address comparators can be used to determine where a program may
be getting lost or when data is being written to areas which should not
be written. They are also useful in halting a program at a specific point
to examine or change registers or memory. Using address comparators
to set breakpoints enables the user to set breakpoints in RAM or ROM
in any operating mode. Memory accesses are monitored according to
the contents of the OCR.
The address comparator generates a match signal when the address on
the bus matches the address stored in the Breakpoint Address Base
Register, as masked with individual bit masking capability provided by
the Breakpoint Address Mask Register. The address match signal and
the access attributes are further qualified with the RCx4–RCx0 and
BCx4–BCx0 control bits. This qualification is used to decrement the
breakpoint counter conditionally if its contents are non-zero. If the
contents are zero, the counter is not decremented and the breakpoint
event occurs (ISBKPTx asserted).
The MAL is a 32-bit register that latches the address bus on every
access.
The 32-bit Breakpoint Address Base Registers (BABA and BABB) store
memory breakpoint base addresses. BABA and BABB can be read or
written through the OnCE serial interface. Before enabling breakpoints,
the external command controller should load these registers.
The 32-bit Breakpoint Address Mask Registers (BAMA and BAMB)
registers store memory breakpoint base address masks. BAMA and
BAMB can be read or written through the OnCE serial interface. Before
enabling breakpoints, the external command controller should load
these registers.
Freescale Semiconductor, Inc.
For More Information On This Product,
JTAG Test Access Port and OnCE
Go to: www.freescale.com
JTAG Test Access Port and OnCE
Functional Description
Advance Information
597
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