MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 131

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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4.7.3.3 Chip Identification Register
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Address: 0x00c1_0006 and 0x00c1_0007
Reset:
Reset:
Read:
Read:
Write:
Write:
BOOTSEL — Boot Select Bit
MODE — Chip Configuration Mode Bit
The Chip Identification Register (CIR) is a read-only register; writing to
CIR has no effect.
This read-only bit reflects the default selection for the boot device.
The default function of the boot select can be overridden during reset
configuration. If the default mode is overridden, the CSEN bit in
CSCR0 bit reflects the boot device configuration.
The read-only MODE bit reflects the chip configuration mode.
The default mode can be overridden during reset configuration. If the
default mode is overridden, the MODE bits in CCR reflect the mode
configuration.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Boot from external boot device
0 = Boot from internal boot device
1 = Master mode
0 = Single-chip mode
Bit 15
PRN7
PIN7
Bit 7
0
0
0
0
Figure 4-4. Chip Identification Register (CIR)
Chip Configuration Module (CCM)
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= Writes have no effect and the access terminates without a transfer error exception.
PRN6
PIN6
14
0
0
6
0
0
PRN5
PIN5
13
0
0
5
0
0
PRN4
PIN4
12
1
1
4
0
0
PRN3
PIN3
11
1
1
3
0
0
Chip Configuration Module (CCM)
Memory Map and Registers
PRN2
PIN2
10
1
1
2
0
0
Advance Information
PRN1
PIN1
9
1
1
1
0
0
PRN0
PIN0
Bit 8
Bit 0
0
0
0
0
131

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