MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 164
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Power Management
Advance Information
164
CPU
Reset
Clock
OnCE
JTAG
Interrupt controller
Edge port
RAM
FLASH
QADC
Watchdog timer
PIT1 and PIT2
SPI
SCI1 and SCI2
TIM1 and TIM2
1. “Program” Indicates that the peripheral function during the low-power mode is dependent on programmable bits in the
2. These modules can generate a reset which will exit any low-power mode.
3. The OnCE logic is clocked by a separate TCLK clock. Entering debug mode via the OnCE port (or assertion of the external
4. These modules can generate a interrupt which will exit any low-power mode. The CPU will begin to service the interrupt
peripheral register map.
DE pin) exits any low-power mode. Upon exit from debug mode, the previous low-power mode will be re-entered and the
changes made during debug mode will remain in effect.
exception after wakeup.
Module
Table 6-1. CPU and Peripherals in Low-Power Modes
Run Mode
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Program
Stopped
Enabled
Stopped
Stopped
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Power Management
Wait Mode
Peripheral Status
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
(2)
(2)
(3)
(4)
(4)
(4)
(2)
(4)
(4)
(4)
(4)
(1)
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
Program
Program
Program
Program
Stopped
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Stopped
Stopped
Enabled
Enabled
/ Wakeup Capability
Doze Mode
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
(2)
(2)
(3)
(4)
(4)
(4)
(2)
(4)
(4)
(4)
(4)
Program
Stopped
Enabled
Enabled
Enabled
Enabled
Stopped
Stopped
Stopped
Stopped
Stopped
Stopped
Stopped
Stopped
Stopped
Stop Mode
MOTOROLA
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
(2)
(2)
(3)
(4)
(4)
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