MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 483

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
QS:
Q1:
Q2:
QS:
Q1:
Q2:
IDLE
Q1:
T1
C1
TOR1
T1
IDLE
0000
C2
TOR1
ACTIVE
T1
1000
In situation S2
before servicing of a previous trigger event is complete. The trigger
overrun bit is again set, but the additional trigger events are otherwise
ignored. After the queue is complete, the first newly detected trigger
event causes queue execution to begin again. When the trigger event
rate is high, a new trigger event can be seen very soon after completion
of the previous queue, leaving little time to retrieve the previous results.
Also, when trigger events are occurring at a high rate for queue 1, the
lower priority queue 2 channels may not get serviced at all.
C3
TOR1
T1
Freescale Semiconductor, Inc.
Figure 19-23. CCW Priority Situation 1
Figure 19-24. CCW Priority Situation 2
Q1:
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
C4
T1
CF1
IDLE
IDLE
C1
IDLE
TOR1
T1
T1
Go to: www.freescale.com
C2
ACTIVE
C1
1000
(Figure
C3
C2
ACTIVE
1000
C4
C3
19-24), more than one trigger event is recognized
CF1
C4
0000
CF1
Q2:
T2
Queued Analog-to-Digital Converter (QADC)
C1
0000
C2
ACTIVE
Q2:
TOR2
T2
0010
T2
C3
IDLE
IDLE
C1
C4
TOR2
T2
C2
ACTIVE
CF2
0010
TOR2
C3
T2
Advance Information
IDLE
0000
C4
CF2
Digital Control
IDLE
0000
483

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