MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 469

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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19.8.8.2 Left-Justified Signed Result Register (LJSRR)
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Address: 0x00ca_0300 through 0x00ca_037e
Reset:
Reset:
Read:
Read:
Write:
Write:
S — Sign Bit
RESULT[14:6] — Result Field
Figure 19-16. Left-Justified Signed Result Register (LJSRR)
The left justified, signed format corresponds to a half-scale, offset
binary, two’s complement data format. Conversion values
corresponding to 1/2 full scale, 0x0200, or higher are interpreted as
positive values and have a sign bit of 0. An unsigned, right justified
conversion of 0x0200 would be represented as 0x0000 in this signed
register, where the sign = 0 and the result = 0. For an unsigned, right
justified conversion of 0x3FF (full range or V
equivalent in this register would be 0x7FC0, sign = 0 and
result = 0x1FF. For an unsigned, right justified conversion of 0x0000
(V
and result = 0x000, a two’s complement value representing –512.
The conversion result is signed, left-justified data.
Freescale Semiconductor, Inc.
RL
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
Bit 15
Bit 7
), the signed equivalent in this register would be 0x8000, sign = 1
S
RESULT
Go to: www.freescale.com
= Writes have no effect and the access terminates without a transfer error exception.
14
6
13
5
0
0
12
4
0
0
Queued Analog-to-Digital Converter (QADC)
RESULT
11
3
0
0
RH
10
), the signed
2
0
0
Register Descriptions
Advance Information
9
1
0
0
Bit 8
Bit 0
0
0
469

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