MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 309
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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15.6.2.1 PIT Control and Status Register
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Address: PIT1 — 0x00c8_0000 and 0x00c8_0001
Reset:
Reset:
PRE[3:0] — Prescaler Bits
PDOZE — Doze Mode Bit
Read:
Read:
Write:
Write:
Programmable Interrupt Timer Modules (PIT1 and PIT2)
The read/write PRE[3:0] bits select the system clock divisor to
generate the PIT clock as
To accurately predict the timing of the next count, change the
PRE[3:0] bits only when the enable bit (EN) is clear. Changing the
PRE[3:0] resets the prescaler counter. System reset and the loading
of a new value into the counter also reset the prescaler counter.
Setting the EN bit and writing to PRE[3:0] can be done in this same
write cycle. Clearing the EN bit stops the prescaler counter.
The read/write PDOZE bit controls the function of the PIT in doze
mode. Reset clears PDOZE.
When doze mode is exited, timer operation continues from the state
it was in before entering doze mode.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = PIT function stopped in doze mode
0 = PIT function not affected in doze mode
PIT2 — 0x00c9_0000 and 0x00c9_0001
Figure 15-2. PIT Control and Status Register (PCSR)
Bit 15
Bit 7
0
0
0
0
Go to: www.freescale.com
= Writes have no effect and the access terminates without a transfer error exception.
PDOZE
14
0
0
6
0
PDBG
Programmable Interrupt Timer Modules (PIT1 and PIT2)
13
0
0
5
0
Table 15-2
OVW
12
0
0
4
0
PRE3
shows.
PIE
11
0
3
0
Memory Map and Registers
PRE2
PIF
10
0
2
0
Advance Information
PRE1
RLD
9
0
1
0
PRE0
Bit 8
Bit 0
EN
0
0
309
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