MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 361

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.7.2 SCI Control Register 1
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
NOTE:
Serial Communications Interface Modules (SCI1 and SCI2)
Address: SCI1 — 0x00cc_0002
Read: Anytime
Write: Anytime
LOOPS — Loop Select Bit
The RXD pin becomes general-purpose I/O when LOOPS = 1,
regardless of the state of the RSRC bit. DDRSC0 in SCIDDR is the data
direction bit for the RXD pin.
Reset:
Read:
Write:
This read/write control bit switches the SCI between normal mode
and loop mode. Reset clears LOOPS.
The SCI operates normally (LOOPS = 0, RSRC = X) when the output
of its transmitter is connected to the TXD pin, and the input of its
receiver is connected to the RXD pin.
In loop mode (LOOPS =1, RSRC = 0), the input to the SCI receiver is
internally disconnected from the RXD pin logic and instead connected
to the output of the SCI transmitter. The behavior of TXD is governed
by the DDRSC1 bit in SCIDDR. If DDRSC1 = 1, the TXD pin is driven
with the output of the SCI transmitter. If DDRSC1 = 0, the TXD pin
idles high. See
For either loop mode or single-wire mode to function, both the SCI
receiver and transmitter must be enabled by setting the RE and TE
bits in SCIxCR2.
Table 17-3
SCI operation and the configuration of the RXD and TXD pins.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Loop mode SCI operation
0 = Normal mode SCI operation
SCI2 — 0x00cd_0002
LOOPS
Bit 7
0
Figure 17-4. SCI Control Register 1 (SCICR1)
Go to: www.freescale.com
shows how the LOOPS, RSRC, and DDRSC0 bits affect
WOMS
6
0
17.14 Loop Operation
Serial Communications Interface Modules (SCI1 and SCI2)
RSRC
5
0
M
4
0
WAKE
for additional information.
3
0
Memory Map and Registers
ILT
2
0
Advance Information
PE
1
0
Bit 0
PT
0
361