MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 480

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Queued Analog-to-Digital Converter (QADC)
Advance Information
480
Trigger events which occur during the execution of a subqueue are
ignored, except that the trigger overrun flag is set. When a
continuous-scan mode is selected, a trigger event occurring after the
completion of the last subqueue (after the queue completion flag is set),
causes the execution to continue with the first subqueue, starting with
the first CCW in the queue.
When the QADC encounters a CCW with the pause bit set, the queue
enters the paused state after completing the conversion specified in the
CCW with the pause bit. The pause flag is set and a pause interrupt may
optionally be requested. The status of the queue is shown to be paused,
indicating completion of a subqueue. The QADC then waits for another
trigger event to again begin execution of the next subqueue.
BQ2
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Freescale Semiconductor, Inc.
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For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
CONVERSION COMMAND
BEGINNING OF QUEUE 1
BEGINNING OF QUEUE 2
Figure 19-22. QADC Queue Operation with Pause
WORD (CCW) TABLE
END OF QUEUE 1
END OF QUEUE 2
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PAUSE
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PAUSE
PAUSE
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CHANNEL SELECT,
A/D CONVERSION
SAMPLE, HOLD,
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
RESULT WORD TABLE
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MOTOROLA
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