MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 548

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chip Select Module
21.3 Features
Advance Information
548
Features of the chip select module include:
Freescale Semiconductor, Inc.
For More Information On This Product,
Reduced system complexity — No external glue logic required for
typical systems if chip selects are used.
Four programmable asynchronous active-low chip selects
(CS[3:0]) — Chip selects can be independently programmed with
various features.
Control for external boot device — CS0 can be enabled at reset to
select an external boot device.
Fixed base addresses with 8-Mbyte block sizes
Support for emulating internal memory space — When the EMINT
bit is set in the Chip Configuration Register (CCR), CS1 matches
only addresses in the internal memory space.
Support for 16-bit and 32-bit external devices — The external port
size can be programmed to be 16 or 32 bits.
Programmable write protection — Each chip select address range
can be designated for read access only.
Programmable access protection — Each chip select address
range can be designated for supervisor access only.
Write-enable selection — The enable byte pins (EB[3:0]) can be
configured as byte enables (assert on both external read and write
accesses) or write enables (only assert on external write
accesses).
Bus cycle termination — This option allows the chip select logic to
terminate the bus cycle.
Programmable wait states — To interface with various devices, up
to seven wait states can be programmed before the access is
terminated.
Programmable extra wait state for write accesses — One wait
state can be added to write accesses to allow writing to memories
that require additional data setup time.
Go to: www.freescale.com
Chip Select Module
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA

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