MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 239
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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10.9.1 Back Door Access
10.9.2 Erase Verify Check
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
NOTE:
The SGFM may be unsecured via one of two methods:
If the KEYEN bit is set, security can be bypassed by:
The security of the FLASH as defined by the FLASH security word at
address 0x0000_0228 is not changed by the back door method of
unsecuring the device. After the next reset the device is again secured
and the same back door key remains in effect unless changed by
program or erase operations. The back door method of unsecuring the
device has no effect on the program and erase protections defined by
the SGFM Protection Register (SGFMPROT).
Security can be disabled by verifying that the SGFM array is blank. If
required, the mass erase command can be executed for each pair of
FLASH physical blocks that comprise the array. The erase verify
command must then be executed for all FLASH physical blocks within
the array. The SGFM will be unsecured if the erase verify command
determines that the entire array is blank. After the next reset, the security
1. Executing a back door access scheme.
2. Passing an erase verify check.
1. Setting the KEYACC bit in the SGFM Configuration Register
2. Writing the correct 8-byte back door comparison key to the SGFM
3. Clearing the KEYACC bit.
4. If all 8 bytes written match the array contents at addresses
Freescale Semiconductor, Inc.
Second Generation FLASH for M•CORE (SGFM)
For More Information On This Product,
(SGFMMCR).
array at addresses 0x0000_0200 to 0x0000_0207. This operation
must consist of two 32-bit writes to address 0x0000_0200 and
0x0000_0204 in that order. The two back door write cycles can be
separated by any number of bus cycles.
0x0000_0200 to 0x0000_0207, then security is bypassed until the
next reset.
Go to: www.freescale.com
Second Generation FLASH for M•CORE (SGFM)
FLASH Security Operation
Advance Information
239
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