MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 421

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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18.8.6 Bidirectional Mode
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Bidirectional Mode
Normal Mode
SPC0 = 0
SPC0 = 1
SPE = 1
Table 18-7. Normal Mode and Bidirectional Mode
SWOM enables open drain output
SWOM enables open drain output.
SPI port pin 0 is general-purpose I/O.
Setting the SPC0 bit in SPICR1 selects bidirectional mode (see
Table
external device(s). The MSTR bit determines which pin to use. In master
mode, the MOSI pin is the master out/master in pin, MOMI. In slave
mode, the MISO pin is the slave out/slave in pin, SISO. The MISO pin in
master mode and MOSI pin in slave mode are general-purpose I/O pins.
The direction of each data I/O pin depends on its data direction register
bit. A pin configured as an output is the output from the shift register. A
pin configured as an input is the input to the shift register, and data
coming out of the shift register is discarded.
The SCK pin is an output in master mode and an input in slave mode.
The SS pin can be an input or an output in master mode, and it is always
an input in slave mode.
In bidirectional mode, a mode fault does not clear DDRSP0, the data
direction bit for the SISO pin.
SERIAL OUT
SERIAL OUT
SERIAL IN
SERIAL IN
Freescale Semiconductor, Inc.
SPI
SPI
For More Information On This Product,
Master Mode, MSTR = 1
18-7). The SPI uses only one data pin for the interface with
Serial Peripheral Interface Module (SPI)
DDRSP1
DDRSP1
Go to: www.freescale.com
SPI PORT
MOMI
MOSI
MISO
PIN 0
.
SWOM enables open drain output
SWOM enables open drain output.
SPI port pin 1 is general-purpose I/O.
Ã
Serial Peripheral Interface Module (SPI)
SERIAL OUT
SERIAL OUT
SERIAL IN
SERIAL IN
SPI
SPI
Slave Mode, MSTR = 0
DDRSP0
DDRSP0
Functional Description
Advance Information
SPI PORT
MOSI
MISO
PIN 1
SISO
.
421

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