MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 476
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
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Queued Analog-to-Digital Converter (QADC)
19.9.3.3 Channel Decode and Multiplexer
19.9.3.4 Sample Buffer
19.9.3.5 Digital-to-Analog Converter (DAC) Array
Advance Information
476
NOTE:
Because of internal RC time constants, use of a two QCLK sample time
in bypass mode will cause serious errors when operating the QADC at
high frequencies.
The internal multiplexer selects one of the eight analog input pins for
conversion. The selected input is connected to the sample buffer
amplifier or to the sample capacitor. The multiplexer also includes
positive and negative stress protection circuitry, which prevents
deselected channels from affecting the selected channel when current is
injected into the deselected channels.
The sample buffer is used to raise the effective input impedance of the
A/D converter, so that external factors (higher bandwidth or higher
impedance) are less critical to accuracy. The input voltage is buffered
onto the sample capacitor to reduce crosstalk between channels.
The digital-to-analog converter (DAC) array consists of binary-weighted
capacitors and a resistor-divider chain. The reference voltages, V
V
also converts the following three internal channels:
QCLK
RL
•
•
•
Freescale Semiconductor, Inc.
, are used by the DAC to perform ratiometric conversions. The DAC
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
V
V
(V
RH
RL
RH
SAMPLE TIME
N CYCLES
(2,4,8,16)
SAMPLE
Figure 19-21. Bypass Mode Conversion Timing
— reference voltage low
— reference voltage high
–V
TIME:
Go to: www.freescale.com
RL
)/2 — reference voltage
SUCCESSIVE APPROXIMATION RESOLUTION SEQUENCE
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
RESOLUTION
10 CYCLES
TIME:
MOTOROLA
RH
and
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